Method of forming an alignment feature in or on a

专利名称：Method of forming an alignment feature in

or on a multi-layered semiconductorstructure

发明人：David M. Boulin,Reginald C. Farrow,Isik C.

Kizilyalli,Nace Layadi,Masis Mkrtchyan

申请号：US09867202申请日：20010529

公开号：US20020004283A1公开日：20020110

专利附图：

摘要：A method of forming a multi-layered semiconductor structure having an

alignment feature for aligning a lithography mask and that may be used in connectionwith a SCALPEL tool. The present invention is particularly well-suited for sub-micronCMOS technology devices and circuits, but is not limited thereto. The present inventionadvantageously permits use of an electron beam source for both alignment andexposure of a lithography mask on a semiconductor wafer. The present invention alsoadvantageously enables the formation of an alignment feature early (i.e., zero-level) inthe semiconductor device fabrication process.

申请人：BOULIN DAVID M.,FARROW REGINALD C.,KIZILYALLI ISIK C.,LAYADINACE,MKRTCHYAN MASIS

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