The AOZ1015 is a high efficiency, simple to use, 1.5A buck regulator. The AOZ1015 works from a 4.5V to 16V input voltage range, and provides up to 1.5A of continuous output current with an output voltage adjustable down to 0.8V.
The AOZ1015 comes in an SO-8 package and is rated over a -40°C to +85°C ambient temperature range.
Features
●●
4.5V to 16V operating input voltage range130mΩ internal PFET switch for high efficiency: up to 95%
Internal Schottky diodeInternal soft start
Output voltage adjustable to 0.8V1.5A continuous output currentFixed 500kHz PWM operationCycle-by-cycle current limitShort-circuit protectionUnder voltage lockoutOutput over voltage protectionThermal shutdownSmall size SO-8 package
●●●●●●●●●●●
Applications
●●●●●●●
Point of load DC/DC conversionPCIe graphics cardsSet top boxesDVD drives and HDD LCD panelsCable modems
Telecom/networking/datacom equipment
Typical ApplicationVINC122µF CeramicVINFrom µPCENCOMPR1C51nFC2L14.7µHAOZ1015LXR2FBVOUTC4, C622µF x 2 CeramicAGNDPGNDR3Figure 1. 3.3V/1.5A Buck Regulator
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AOZ1015Ordering Information
Part Number
AOZ1015AI
Ambient Temperature Range
-40°C to +85°C
Package
SO-8
Environmental
RoHS
All AOS Products are offering in packaging with Pb-free plating and compliant to RoHS standards. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
PGNDVINAGNDFB12348765LXLXENCOMPSO-8 (Top View)Pin Description
Pin Number
1234567, 8
Pin Name
PGNDVINAGNDFBCOMPENLX
Pin Function
Power ground. Electrically needs to be connected to AGND.
Supply voltage input. When VIN rises above the UVLO threshold the device starts up.Reference connection for controller section. Also used as thermal connection for controller section. Electrically needs to be connected to PGND.
The FB pin is used to determine the output voltage via a resistor divider between the output and GND.
External loop compensation pin.
The enable pin is active HIGH. Connect EN pin to VIN if not used. Do not leave the EN pin floating.
PWM output connection to inductor. Thermal connection for output stage.
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AOZ1015Block Diagram
VINENUVLO& POR5V LDORegulatorInternal+5VOTP+ISenReference& BiasSoftstartILimit–Q1+0.8V+FBEAmp–PWM–Comp+PWMControlLogicLevelShifter+FETDriverLXCOMP+0.2V–Frequency FoldbackComparator500kHz/38kHzOscillator0.96V+–Over VoltageProtectionComparator AGNDPGNDAbsolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the device.
Recommend Operating Ratings
The device is not guaranteed to operate beyond the Maximum Operating Ratings.
Parameter
Supply Voltage (VIN)LX to AGNDEN to AGNDFB to AGNDCOMP to AGNDPGND to AGND
Junction Temperature (TJ)Storage Temperature (TS)ESD Rating(1)Human Body ModelMachine Model
18V
Rating
-0.7V to VIN+0.3V-0.3V to VIN+0.3V-0.3V to 6V -0.3V to 6V-0.3V to +0.3V+150°C-65°C to +150°C2kV200V
Parameter
Supply Voltage (VIN)Output Voltage RangeAmbient Temperature (TA)Package Thermal Resistance SO-8(ΘJA)(2)
Rating
4.5V to 16V0.8V to VIN-40°C to +85°C87°C/W
Note:
2. The value of ΘJA is measured with the device mounted on 1-in2 FR-4 board with 2oz. Copper, in a still air environment with TA = 25°C. The value in any given application depends on the user’s specific board design.
Note:
1. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5kΩ in series with 100pF. The machine model is a 200pF capacitor discharged directly into each pin.
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AOZ1015Electrical Characteristics
Symbol
VINVUVLOIINIOFFVFB
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.(3)
Parameter
Supply Voltage
Input Under-Voltage Lockout ThresholdSupply Current (Quiescent)Shutdown Supply CurrentFeedback VoltageLoad RegulationLine Regulation
Conditions
VIN RisingVIN Falling
IOUT = 0, VFB = 1.2V, VEN > 1.2VVEN = 0V
Min.
4.5
Typ.
4.003.7021
Max.
16
Units
VV
3100.818
mAµAV%%
0.7820.80.50.5
IFBENABLEVENVHYSIENfODMAXDMIN
Feedback Voltage Input CurrentEN Input ThresholdEN Input HysteresisEN Input CurrentFrequency
Maximum Duty CycleMinimum Duty CycleError Amplifier Voltage GainError Amplifier Transconductance
500200
2
Off thresholdOn threshold
9608601502.2
VIN = 12VVIN = 5V
97166
400100
500
Off ThresholdOn Threshold
2000.6
2.0
100
16006
nA
VmVµAkHz%%V / VµA / V
MODULATOR
PROTECTION
ILIMVPRTJtSS
Current Limit
Output Over-Voltage Protection Threshold
Over-Temperature Shutdown LimitSoft Start Interval
High-Side Switch On-Resistance
3.6
AmV°Cms
130200
OUTPUT STAGE
mΩ
Note:
3. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
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AOZ1015Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) OperationVin ripple0.1V/divFull Load (CCM) OperationVin ripple0.1V/divVo ripple20mV/divVo ripple20mV/divIL1A/divVLX10V/divIL1A/divVLX10V/div 1μs/div1μs/div Startup to Full LoadVin10V/divFull Load to TurnoffVin10V/divVo1V/divIin0.5A/divVo1V/divIin0.5A/div400μs/div400μs/div 50% to 100% Load TransientLight Load to TurnoffVo Ripple50mV/divVin5V/divVo1V/divIo1A/divIin0.5A/div100μs/div 1s/div Rev. 1.4 April 2011www.aosmd.comPage 5 of 15
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AOZ1015Typical Performance Characteristics (Continued)
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Short Circuit ProtectionShort Circuit RecoveryVo2V/div Vo2V/div IL1A/divIL1A/div100μs/div AOZ1015AI EfficiencyEfficiency (VIN = 12V) vs. Load Current8.0V OUTPUT5.0V OUTPUT1ms/div 1009590Efficieny (%)853.3V OUTPUT8075706500.20.40.60.81.01.21.41.6Load Current (A)Thermal de-rating curves for SO-8 package part under typical input and output condition based on the evaluation board.25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.Derating Curves at 5V Input2.01.8Output Current (IO)Derating Curves at 12V Input2.01.8Output Current (IO)1.61.41.21.00.80.60.40.2025354555653.3V, 5.0V Output1.8V Output1.61.41.21.00.80.60.40.203.3V, 5.0V, 8.0 Output1.8V Output758525354555657585Ambient Temperature (TA)Rev. 1.4 April 2011
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AOZ1015The AOZ1015 uses a P-Channel MOSFET as the high side switch. It saves the bootstrap capacitor normally seen in a circuit which is using an NMOS switch. It allows 100% turn-on of the upper switch to achieve linear regu-lation mode of operation. The minimum voltage drop from VIN to VO is the load current X DC resistance of MOSFET + DC resistance of the buck inductor. It can be calculated by equation below:
Detailed Description
The AOZ1015 is a current-mode step down regulator with integrated high side PMOS switch and a low side freewheeling Schottky diode. It operates from a 4.5V to 16V input voltage range and supplies up to 1.5A of load current. The duty cycle can be adjusted from 6% to 100% allowing a wide range of output voltages. Features include; enable control, Power-On Reset, input under voltage lockout, fixed internal soft-start and thermal shut down.
The AOZ1015 is available in an SO-8 package.
VO_MAX=VIN–IO×(RDS(ON)+Rinductor)
where;
VO_MAX is the maximum output voltage,VIN is the input voltage from 4.5V to 16V,IO is the output current from 0A to 1.5A,
RDS(ON) is the on resistance of the internal MOSFET, the value is between 97mΩ and 200mΩ depending on input voltage and junction temperature, and
Rinductor is the inductor DC resistance.
Enable and Soft Start
The AOZ1015 has an internal soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. A soft start process begins when the input voltage rises to 4.0V and voltage on EN pin is HIGH. In the soft start process, the output voltage is typically ramped to regulation voltage in 2.2ms. The 2.2ms soft start time is set internally.
The EN pin of the AOZ1015 is active HIGH. Connect the EN pin to VIN if the enable function is not used. Pulling EN to ground will disable the AOZ1015. Do not leave it open. The voltage on the EN pin must be above 2.0V to enable the AOZ1015. When voltage on EN falls below 0.6V, the AOZ1015 is disabled. If an application circuit requires the AOZ1015 to be disabled, an open drain or open collector circuit should be used to interface to EN pin.
Switching Frequency
The AOZ1015 switching frequency is fixed and set by an internal oscillator. The actual switching frequency could range from 400kHz to 600kHz due to device variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to the FB pin with a resistor divider network. In the
application circuit shown in Figure 1. The resistor divider network includes R2 and R3. Usually, a design is started by picking a fixed R3 value and calculating the required R2 with equation below.
Steady-State Operation
Under steady-state conditions, the converter operates in fixed frequency and Continuous-Conduction Mode (CCM).
The AOZ1015 integrates an internal P-MOSFET as the high-side switch. Inductor current is sensed by amplifying the voltage drop across the drain to source of the high side power MOSFET. Output voltage is divided down by the external voltage divider at the FB pin. The difference of the FB pin voltage and reference is amplified by the internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against the current signal, which is the sum of inductor current signal and ramp compensation signal, at PWM comparator input. If the current signal is less than the error voltage, the internal high-side switch is on. The inductor current flows from the input through the inductor to the output. When the current signal exceeds the error voltage, the high-side switch is off. The inductor current is freewheeling through the internal Schottky diode to output.
R2⎞⎛
VO=0.8×⎜1+------⎟
R3⎠⎝
Some standard values of R2, R3 for most commonly used
output voltage values are listed in Table 1. Table 1.
VO (V)
0.81.21.51.82.53.35.0
R2 (kΩ)
1.04.991012.721.531.652.3
R3 (kΩ)
Open1011.510.2101010
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AOZ1015Power-On Reset (POR)
A power-on reset circuit monitors the input voltage.
When the input voltage exceeds 4V, the converter starts operation. When input voltage falls below 3.7V, the converter will stop switching. Thermal Protection
An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and high side PMOS if the junction temperature exceeds 150°C.
The combination of R2 and R3 should be large enough to avoid drawing excessive current from the output, which will cause power loss.
Since the switch duty cycle can be as high as 100%, the maximum output voltage can be set as high as the input voltage minus the voltage drop on upper PMOS and inductor.
Protection Features
The AOZ1015 has multiple protection features to prevent system circuit damage under abnormal conditions. Over Current Protection (OCP)
The sensed inductor current signal is also used for over current protection. Since the AOZ1015 employs peak current mode control, the COMP pin voltage is proportional to the peak inductor current. The COMP pin voltage is limited to be between 0.4V and 2.5V internally. The peak inductor current is automatically limited cycle by cycle.
The cycle by cycle current limit threshold is set between 2.5A and 3.6A. When the load current reaches the current limit threshold, the cycle by cycle current limit circuit turns off the high side switch immediately to terminate the current duty cycle. The inductor current stop rising. The cycle by cycle current limit protection directly limits inductor peak current. The average induc-tor current is also limited due to the limitation on peak inductor current. When cycle by cycle current limit circuit is triggered, the output voltage drops as the duty cycle decreases.
The AOZ1015 has internal short circuit protection to protect itself from catastrophic failure under output short circuit conditions. The FB pin voltage is proportional to the output voltage. Whenever FB pin voltage is below 0.2V, the short circuit protection circuit is triggered. As a result, the converter is shut down and hiccups at a frequency equal to 1/8 of normal switching frequency. The converter will start up via a soft start once the short circuit condition is resolved. In short circuit protection mode, the inductor average current is greatly reduced because of the low hiccup frequency.Output Over Voltage Protection (OVP)
The AOZ1015 monitors the feedback voltage. When the feedback voltage is higher than 960mV, it immediately turns-off the PMOS to protect the output voltage
overshoot at fault condition. When feedback voltage is lower than 940mV, the PMOS is allowed to turn on in the next cycle.
Application Information
The basic AOZ1015 application circuit is shown in Figure 1. Component selection is explained below.Input Capacitor
The input capacitor (C1 in Figure 1) must be connected to the VIN pin and PGND pin of the AOZ1015 to maintain steady input voltage and filter out the pulsing input current. A small decoupling capacitor (Cd in Figure 1), usually 1µF, should be connected to the VIN pin and AGND pin for stable operation of the AOZ1015. The voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage.
The input ripple voltage can be approximated by equa-tion below:
V⎞VOIO⎛
---⎟×---------×⎜1–-----OΔVIN=----------------f×CIN⎝VIN⎠VIN
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is another concern when selecting the capacitor. For a buck circuit, the RMS value of input capacitor current can be calculated by:
V⎛V⎞---⎜1–-----O---⎟ICIN_RMS=IO×-----OVIN⎝VIN⎠
If let m equal the conversion ratio:
V
-----O---=mVIN
The relationship between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 2. It can be seen that when VO is half of VIN, CIN is under the worst current stress. The worst current stress on CIN is 0.5 x IO.
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0.50.4ICIN_RMS(m)0.3IO0.20.10AOZ1015The inductor takes the highest current in a buck circuit. The conduction loss on inductor needs to be checked for thermal and efficiency requirements.
Surface mount inductors in different shape and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise. They cost more than unshielded inductors. The choice depends on EMI requirement, price and size.Output Capacitor
00.5m1The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating.
The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be consid-ered for long term reliability.
Output ripple voltage specification is another important factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. It can be calculated by the equation below:
Figure 2. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the input capacitors must have current rating higher than ICIN_RMS at the worst operating conditions. Ceramic capacitors are preferred for input capacitors because of their low ESR and high ripple current rating. Depending on the application circuits, other low ESR tantalum capacitors or aluminum electrolytic capacitors may also be used. When selecting ceramic capacitors, X5R or X7R type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. Note that the ripple current rating from capacitor manufacturers is
based on a certain device life time. Further de-rating may be necessary for practical design requirement. Inductor
The inductor is used to supply constant current to output when it is driven by a switching voltage. For a given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is:
1
ΔVO=ΔIL×⎛ESRCO+-------------------------⎞
⎝8×f×C⎠
O
where,
CO is output capacitor value, and
ESRCO is the equivalent series resistance of the output
capacitor.
VO⎛V⎞
---⎟ΔIL=----------×⎜1–-----O
f×L⎝VIN⎠
The peak inductor current is:
When a low ESR ceramic capacitor is used as an output
capacitor, the impedance of the capacitor at the switch-ing frequency dominates. Output ripple is primarily caused by capacitor value and inductor ripple current. The output ripple voltage calculation can be simplified to:
1
ΔVO=ΔIL×-------------------------8×f×C
O
ΔIL-ILpeak=IO+-------2
High inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also
reduces RMS current through the inductor and switches, which results in less conduction loss. Usually, peak to peak ripple current on inductor is designed to be 20% to 30% of output current.
When selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature.
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is primarily decided by capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified to:
ΔVO=ΔIL×ESRCO
For lower output ripple voltage across the entire operating temperature range, X5R or X7R dielectric type of ceramic, or other low ESR tantalum are recommended to be used as output capacitors.
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AOZ1015where;
GEA is the error amplifier transconductance, which is 200 x 10-6 A/V,
GVEA is the error amplifier voltage gain, which is 500 V/V, andCC is compensation capacitor.
In a buck converter, output capacitor current is continuous. The RMS current of the output capacitor is decided by the peak to peak inductor ripple current. It can be calculated by:
ΔIL
ICO_RMS=----------12Usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. When the buck inductor is selected to be very small and inductor ripple current is high, the output capacitor could be overstressed. Loop Compensation
The AOZ1015 employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It greatly simplifies the compensation loop design.
With peak current mode control, the buck power stage can be simplified to be a one-pole and one-zero system in frequency domain. The pole is the dominant pole and can be calculated by:
The zero given by the external compensation network, capacitor CC (C5 in Figure 1) and resistor RC (R1 in Figure 1), is located at:
1
fZ2=-----------------------------------2π×CC×RC
To design the compensation circuit, a target crossover frequency fC for close loop must be selected. The system crossover frequency is where the control loop has unity gain. The crossover frequency is also called the converter bandwidth. Generally, a higher bandwidth means faster response to load transient. However, the bandwidth should not be too high due to system stability concern. When designing the compensation loop, converter stability under all line and load conditions must be considered.
Usually, it is recommended to set the bandwidth to be less than 1/10 of the switching frequency. The AOZ1015 operates at a fixed switching frequency range from 350kHz to 600kHz. It is recommended to choose a crossover frequency less than 30kHz.
1
fP1=----------------------------------2π×CO×RL
The zero is a ESR zero due to output capacitor and its ESR. It is can be calculated by:
1
fZ1=------------------------------------------------2π×CO×ESRCO
where;
CO is the output filter capacitor,RL is load resistor value, and
ESRCO is the equivalent series resistance of output capacitor.
fC=30kHz
The strategy for choosing RC and CC is to set the cross over frequency with RC and set the compensator zero with CC. Using selected crossover frequency, fC, to calculate RC:
The compensation design is actually to shape the
converter close loop transfer function to get the desired gain and phase. Several different types of compensation networks can be used for the AOZ1015. In most cases, a series capacitor and resistor network connected to the COMP pin sets the pole-zero and is adequate for a stable high-bandwidth control loop.
The FB pin and the COMP pin are the inverting input and the output of the internal transconductance error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is:
VO2π×CO---------------×------------------------RC=fC×
VFBGEA×GCS
where;
fC is the desired crossover frequency,VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200 x 10-6 A/V, and
GCS is the current sense circuit transconductance, which is 5.64 A/V.
GEA
fP2=------------------------------------------2π×CC×GVEA
The compensation capacitor CC and resistor RC together make a zero. This zero is put somewhere close to the dominate pole fp1 but lower than 1/5 of selected crossover frequency. CC can is selected by:
1.5
CC=-----------------------------------2π×RC×fP1
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AOZ1015The maximum junction temperature of the AOZ1015 is 150°C, which limits the maximum load current capability. Please see the thermal de-rating curves for the maximum load current of the AOZ1015 under different ambient temperatures.
The thermal performance of the AOZ1015 is strongly affected by the PCB layout. Extra care should be taken by users during the design process to ensure that the IC will operate under the recommended environmental conditions.
Several layout tips are listed below for the best electronic and thermal performance. Figure 3 illustrates a single layer PCB layout example as reference.
1.Do not use thermal relief connection to the VIN and
the PGND pins. Pour a maximized copper area to the PGND pin and the VIN pin to help thermal dissipation.2.The input capacitors should be connected as close
as possible to the VIN and PGND pins.3.A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them only at one point to avoid the PGND pin noise coupling to the AGND pin. In this case, a decoupling capacitor should be connected between VIN and AGND. 4.Make the current trace from LX pins to L to CO to the
PGND as short as possible.5.Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or VOUT.6.The two LX pins are connected to the internal PFET
drain. They are low resistance thermal conduction path and a noisy switching node. Connecting a copper plane to the LX pin to help thermal dissipa-tion. This copper plane should not be too large otherwise switching noise may be coupled to other parts of the circuit. 7.Keep sensitive signal traces such as trace
connecting FB and COMP away from the LX pins.
The previous equation above can also be simplified to:
CO×RL
CC=---------------------RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be found at www.aosmd.com.
Thermal Management and Layout Consideration
In the AOZ1015 buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the VIN pin, to the LX pins, to the filter inductor, to the output capacitor
and load, and then returns to the input capacitor through ground. Current flows in the first loop when the high side switch is on. The second loop starts from inductor, to the output capacitors and load, to the PGND pin of the
AOZ1015, to the LX pins of the AOZ1015. Current flows in the second loop when the low side diode is on.In PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. A ground plane is recommended to connect input capacitor, output capacitor, and PGND pin of the AOZ1015.
In the AOZ1015 buck regulator circuit, the two major power dissipating components are the AOZ1015 and the output inductor. The total power dissipation of
converter circuit can be measured by input power minus output power.
Ptotal_loss=VIN×IIN–VO×IO
The power dissipation of the inductor can be approxi-mately calculated by output current and DCR of inductor.
Pinductor_loss=IO2×Rinductor×1.1
The actual AOZ1015 junction temperature can be calculated with power dissipation in the AOZ1015 and thermal impedance from junction to ambient.
Tjunction=(Ptotal_loss–Pinductor_loss)×Θ
++Tambient
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AOZ1015 CinCdPGNDVINAGNDR31234R18SO-8 765LXLXENCOMPCoutLFBR2C5Figure 3. AOZ1015 PCB Layout
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AOZ1015Package Dimensions, SO-8L
De8LGauge PlaneSeating Plane0.25EE1h x 45°1θ7° (4x)C0.1A2AbA1Dimensions in millimeters2.20SymbolsAA1A2bcDE1eEhLθMin.1.350.101.250.310.174.803.80Nom.1.65—Max.1.750.251.650.510.255.004.006.200.501.278°Dimensions in inchesSymbolsAA1A2bcDE1eEhLθMin.0.0530.0040.0490.0120.0070.1890.150Nom.Max.0.0650.069—0.0100.0590.065—0.020—0.0100.1930.1970.1540.1570.050 BSC0.2280.2360.2440.010—0.0200.016—0.0500°—8°5.741.27Unit: mm0.801.50——4.903.901.27 BSC5.806.000.25—0.40—0°—Notes:1. All dimensions are in millimeters.2. Dimensions are inclusive of plating3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.4. Dimension L is measured in gauge plane.5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.Rev. 1.4 April 2011www.aosmd.comPage 13 of 15
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AOZ1015Tape and Reel Dimensions
SO-8 Carrier TapeD1TSee Note 5E1E2EP1P2See Note 3See Note 3B0K0Unit: mmPackageSO-8(12mm)A06.40±0.10B05.20±0.10K02.10±0.10D01.60±0.10D11.50±0.10E12.00±0.10E11.75±0.10E25.50±0.10P08.00±0.10P14.00±0.10P22.00±0.10T0.25±0.10A0D0P0Feeding DirectionSO-8 ReelW1SGMVRHWNTape SizeReel SizeMW12mmø330ø330.00ø97.0013.00±0.10±0.30±0.50W117.40±1.00HKø13.0010.60+0.50/-0.20S2.00±0.50G—R—V—NKSO-8 TapeLeader/Trailer& OrientationTrailer Tape300mm min. or75 empty pockets Components TapeOrientation in PocketLeader Tape500mm min. or125 empty pockets Rev. 1.4 April 2011www.aosmd.comPage 14 of 15
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AOZ1015AOZ1015 Part Marking
Z1015AI FAYWLTPart Number Code Fab & Assembly LocationYear & Week CodeAssembly Lot CodeThis datasheet contains preliminary data; supplementary data may be published at a later date. Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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