专利名称：Arithmetic operation unit and arithmetic
operation circuit
发明人：Maejima, Hideo,Hotta, Takashi,Masuda,
Ikuro,Iwamura, Masahiro,Kurita,Kouzaburou,Ueno, Masahiro
申请号：EP85101766.5申请日：19850218公开号：EP0152939A2公开日：19850828
专利附图：
摘要：In an arithmetic operation unit (103) comprising at least a group of registers
(400) and an arithmetic operation circuit (403), bipolar transistors (512, 1011, 1411, 2006,2008) and field effect transistors (500, 503, 504) mixedly exist.
申请人：HITACHI, LTD.
地址：6, Kanda Surugadai 4-chome Chiyoda-ku, Tokyo 100 JP
国籍：JP
代理机构：Beetz & Partner Patentanwälte
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