Integrated circuit via structure

专利名称：Integrated circuit via structure发明人：Michael E. Haslam,Charles R. Spinner, III申请号：US07/876962申请日：19920430公开号：US05321211A公开日：19940614

摘要：A structure and method for forming contact vias in integrated circuits. Aninterconnect layer is formed on an underlying layer in an integrated circuit. A bufferregion is then formed adjacent to the interconnect layer, followed by forming aninsulating layer over the integrated circuit. Preferably, the insulating layer is made of amaterial which is selectively etchable over the material in the buffer region. A contact viais then formed through the insulating layer to expose a portion of the interconnect layer.During formation of the contact via, the buffer region acts as an etch stop and protectsthe underlying layer. The buffer region also ensures a reliable contact will be made in theevent of an error in contact via placement.

申请人：SGS-THOMSON MICROELECTRONICS, INC.

代理人：Kenneth C. Hill,Robert Groover,Richard K. Robinson

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