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XC6106C429资料

2023-03-30 来源:小奈知识网
元器件交易网www.cecb2b.com

Preliminary

◆Manual Reset Input ◆Watchdog Functions ◆Built-in Delay Circuit

◆CMOS Voltage Detector

■APPLICATIONS

●Microprocessor reset circuits

●Memory battery backup circuits ●System power-on reset circuits ●Power failure detection

◆Detect Voltage Range: 1.6~5.0V, ± 2% ◆Reset Function is Selectable VDFL (Low When Detected) VDFH (High When Detected)

■GENERAL DESCRIPTION ■FEATURES

Detect Voltage Range

: 1.6V ~ 5.0V, +2% (100mV increments)

Hysteresis Range : VDF x 5%, TYP.

(XC6101~XC6107)

VDF x 0.1%, TYP.

(XC6111~XC6117)

Operating Voltage Range : 1.0V ~ 6.0V Detect Voltage Temperature Characteristics : +100ppm/OC (TYP.) Output Configuration : N-channel open drain,

CMOS

Watchdog Pin : Watchdog input

If watchdog input maintains ‘H’ or ‘L’ within the watchdog timeout period, a reset signal is output to the RESET output pin

Manual Reset Pin : When driven ‘H’ to ‘L’level

signal, the MRB pin voltage asserts forced reset on theoutput pin.

Release Delay Time : 1.6sec, 400msec, 200msec,

100msec, 50msec, 25msec, 3.13msec (TYP.) can be selectable.

Watchdog Timeout Period : 1.6sec, 400msec, 200msec,

100msec, 50msec,

6.25msec (TYP.) can be selectable.

The XC6101~XC6107, XC6111~XC6117 series are

groups of high-precision, low current consumption voltage detectors with manual reset input function and watchdog functions incorporating CMOS process technology. The series consist of a reference voltage source, delay circuit, comparator, and output driver.

With the built-in delay circuit, the XC6101 ~ XC6107, XC6111 ~ XC6117 series’ ICs do not require any external components to output signals with release delay time. Moreover, with the manual reset function, reset can be asserted at any time. The ICs produce two types of

output; VDFL (low when detected) and VDFH (high when detected).

With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’ ICs, the WD pin can be left open if the watchdog function is not used.

Whenever the watchdog pin is opened, the internal counter clears before the watchdog timeout occurs. Since the manual reset pin is internally pulled up to the VIN pin voltage level, the ICs can be used with the manual reset pin left unconnected if the pin is unused.

The detect voltages are internally fixed 1.6V ~ 5.0V in increments of 100mV, using laser trimming technology. Six watchdog timeout period settings are available in a range from 6.25msec to 1.6sec.

Seven release delay time 1 are available in a range from 3.13msec to 1.6sec.

* Not necessary with CMOS output products.

■TYPICAL APPLICATION CIRCUIT

■TYPICAL PERFORMANCE CHARACTERISTICS ●Supply Current vs. Input Voltage

XC61X1~XC61X5 (2.7V)30Supply Current: ISS (µA)2520151050012345Input Voltage: VIN (V)6Ta=-40℃Ta=25℃Ta=85℃* ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1⇒XC6101 and XC6111)

XC6101_07_XC6111_17 ETR0207_009

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XC6101~XC6107, XC6111~XC6117 Series

PIN CONFIGURATION ■

●SOT-25

XC6101, XC6102 Series

XC6111, XC6112 Series

VIN5WD4XC6103 & XC6113 Series

VIN5WD4XC6104, XC6105 Series XC6114, XC6115 Series

VIN5WD4XC6106, XC6107 SeriesXC6116, XC6117 Series

VIN5MRB41RESETB2VSS3MRB1RESET2VSS3MRB1RESETB231RESETB23VSSRESETVSSRESETSOT-25 (TOP VIEW)

SOT-25 (TOP VIEW)

SOT-25 (TOP VIEW) SOT-25 (TOP VIEW)

●USP-6C

XC6101, XC6102 Series XC6111, XC6112 Series

XC6103 & XC6113 Series

XC6104, XC6105 Series XC6114, XC6115 Series

XC6106, XC6107 SeriesXC6116, XC6117 Series

USP-6C (BOTTOM VIEW)

USP-6C (BOTTOM VIEW)USP-6C (BOTTOM VIEW)

USP-6C (BOTTOM VIEW)

* The dissipation pad for the USP-6C package should be solder-plated in recommended mount pattern and metal masking so as to enhance mounting strength and heat release. If the pad needs to be connected to other pins, it should be connected to the VSS pin.

■PIN ASSIGNMENT

PIN NUMBER

XC6101, XC6102 XC6103 XC6104, XC6105XC6106, XC6107

PIN NAME

XC6111, XC6112 XC6113 XC6114, XC6115XC6116, XC6117SOT-25 USP-6C SOT-25 USP-6C SOT-25 USP-6CSOT-25USP-6C

RESETB 1 4 - - 1 4 1 4 2 5 2 5 2 5 2 5 VSS

FUNCTION

Reset Output

(VDFL: Low Level When Detected)

Ground

3 2 3 2 - - 4 1 MRB Manual Reset 4 1 4 1 4 1 - - WD Watchdog

5 6 5 6 5 6 5 6 VIN Power Input Reset Output - - 1 4 3 2 3 2 RESET (VDFH: High Level When Detected)

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■PRODUCT CLASSIFICATION

●Selection Guide

SERIES WATCHDOG

MANUAL RESET Available

RESET OUTPUT

VDFL (RESETB)

CMOS - CMOS CMOS

N-channel open drain

VDFH (RESET)

- -

CMOS CMOS CMOS CMOS CMOS

XC6101 XC6111 Available Available XC6102

XC6112

Available

XC6103 XC6113 Available XC6105 XC6107

Available Not Available Available

XC6104 XC6114 Available Not Available XC6115 XC6117

Available Not Available

XC6106 XC6116 Not Available Available N-channel open drain N-channel open drain

●Ordering Information XC61①②③④⑤⑥⑦⑧ DESIGNATOR

DESCRIPTION

SYMBOL

DESCRIPTION

① Hysteresis Range Functions and Type of Reset Output

0 : VDF x 5% (TYP.) with hysteresis 1 : VDF x 0.1% (TYP.) without hysteresis

: Watchdog and manual functions, and reset output type as per Selection Guide in the above chart

A B C

: 3.13msec (TYP.) : 25msec (TYP.) : 50msec (TYP.) : 100msec (TYP.) : 200msec (TYP.) : 400msec (TYP.) : 1.6sec (TYP.)

: No WD timeout period for

XC6106, XC6107, XC6116, XC6117 Series : 6.25msec (TYP.) : 50msec (TYP.) : 100msec (TYP.) : 200msec (TYP.) : 400msec (TYP.) : 1.6sec (TYP.) : Detect voltage

ex.) 4.5V: ⑤⇒4, ⑥⇒5

② 1 ~ 7

③ Release Delay Time * D E F H 0 1

④ Watchdog Timeout Period 2 3 4 5 6

⑤⑥ Detect Voltage 16 ~ 50

⑦ Package ⑧ Device Orientation M : SOT-25 E : USP-6C R L

: Embossed tape, standard feed : Embossed tape, reverse feed

* Please set the release delay time shorter than or equal to the watchdog timeout period. ex.) XC6101D427MR or XC6101D327MR

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XC6101~XC6107, XC6111~XC6117 Series

■PACKAGING INFORMATION

●SOT-25

●USP-6C

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■MARKING RULE

●SOT-25

① Represents product series ①②③④

SOT-25 (TOP VIEW)

MARK PRODUCT SERIES MARK PRODUCT SERIES0 XC6101xxxxxx 7 XC6111xxxxxx 1 XC6102xxxxxx 8 XC6112xxxxxx 2 XC6103xxxxxx 9 XC6113xxxxxx 3 XC6104xxxxxx A XC6114xxxxxx 4 XC6105xxxxxx B XC6115xxxxxx 5 XC6106xxxxxx C XC6116xxxxxx 6 XC6107xxxxxx D XC6117xxxxxx ② Represents release delay time and watchdog timeout period RELEASE RELEASE WATCH DOG PRODUCT WATCH DOG MARK DELAY MARKDELAY TIMEOUT PERIOD SERIES TIMEOUT PERIOD TIME TIME A 3.13msec XC61X6, XC61X7 series XC61xxA0xxxxE 50msec400msec 0 3.13msec 6.25msec XC61xxA1xxxxF 50msec1.6sec 1 3.13msec 50msec XC61xxA2xxxxD 100msecXC61X6, XC61X7 series 2 3.13msec 100msec XC61xxA3xxxxH 100msec100msec 3 3.13msec 200msec XC61xxA4xxxxK 100msec200msec 4 3.13msec 400msec XC61xxA5xxxxL 100msec400msec 5 3.13msec 1.6sec XC61xxA6xxxxM 100msec1.6sec B 25msec XC61X6, XC61X7 series XC61xxB0xxxxE 200msecXC61X6, XC61X7 series 6 25msec 50msec XC61xxB2xxxxP 200msec200msec 7 25msec 100msec XC61xxB3xxxxR 200msec400msec 8 25msec 200msec XC61xxB4xxxxS 200msec1.6sec 9 25msec 400msec XC61xxB5xxxxF 400msecXC61X6, XC61X7 series A 25msec 1.6sec XC61xxB6xxxxT 400msec400msec C 50msec XC61X6, XC61X7 series XC61xxC0xxxxU 400msec1.6sec B 50msec 50msec XC61xxC2xxxxH 1.6sec XC61X6, XC61X7 series C 50msec 100msec XC61xxC3xxxxV 1.6sec 1.6sec D 50msec 200msec XC61xxC4xxxx

PRODUCT SERIES XC61xxC5xxxxXC61xxC6xxxxXC61xxD0xxxxXC61xxD3xxxxXC61xxD4xxxxXC61xxD5xxxxXC61xxD6xxxxXC61xxE0xxxxXC61xxE4xxxxXC61xxE5xxxxXC61xxE6xxxxXC61xxF0xxxxXC61xxF5xxxxXC61xxF6xxxxXC61xxH0xxxxXC61xxH6xxxx ③ Represents detect voltage MARK DETECT VOLTAGE PRODUCT SERIES MARK DETECT VOLTAGE PRODUCT SERIES F 1.6 XC61Xxxx16xx 3 3.4 XC61Xxxx34xx H 1.7 XC61Xxxx17xx 4 3.5 XC61Xxxx35xx K 1.8 XC61Xxxx18xx 5 3.6 XC61Xxxx36xx L 1.9 XC61Xxxx19xx 6 3.7 XC61Xxxx37xx M 2.0 XC61Xxxx20xx 7 3.8 XC61Xxxx38xx N 2.1 XC61Xxxx21xx 8 3.9 XC61Xxxx39xx P 2.2 XC61Xxxx22xx 9 4.0 XC61Xxxx40xx R 2.3 XC61Xxxx23xx A 4.1 XC61Xxxx41xx S 2.4 XC61Xxxx24xx B 4.2 XC61Xxxx42xx T 2.5 XC61Xxxx25xx C 4.3 XC61Xxxx43xx U 2.6 XC61Xxxx26xx D 4.4 XC61Xxxx44xx V 2.7 XC61Xxxx27xx E 4.5 XC61Xxxx45xx X 2.8 XC61Xxxx28xx F 4.6 XC61Xxxx46xx Y 2.9 XC61Xxxx29xx H 4.7 XC61Xxxx47xx Z 3.0 XC61Xxxx30xx K 4.8 XC61Xxxx48xx 0 3.1 XC61Xxxx31xx L 4.9 XC61Xxxx49xx 1 3.2 XC61Xxxx32xx M 5.0 XC61Xxxx50xx 2 3.3 XC61Xxxx33xx ④ Represents production lot number

0 to 9 and A to Z and inverted 0 to 9 and A to Z repeated. (G, I, J, O, Q, W expected.) * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101~XC6107, XC6111~XC6117 Series

■MARKING RULE (Continued)

●USP-6C

① Represents product series

USP-6C (TOP VIEW)

MARK PRODUCT SERIES MARK PRODUCT SERIES3 XC6101xxxxxx 8 XC6111xxxxxx 4 XC6102xxxxxx 9 XC6112xxxxxx 5 XC6103xxxxxx A XC6113xxxxxx 6 XC6104xxxxxx B XC6114xxxxxx 7 XC6105xxxxxx C XC6115xxxxxx 3 XC6106xxxxxx 8 XC6116xxxxxx 4 XC6107xxxxxx 9 XC6117xxxxxx ② Represents release delay time MARK RELEASE DELAY TIME PRODUCT SERIESA 3.13msec XC61XxAxxxxx B 25msec XC61XxBxxxxx C 50msec XC61XxCxxxxx D 100msec XC61XxDxxxxx E 200msec XC61XxExxxxx F 400msec XC61XxFxxxxx H 1.6sec XC61XxHxxxxx

③ Represents watchdog timeout period MARK WATCHDOG TIMEOUT PERIOD PRODUCT SERIES 0 XC61X6, XC61X7 series XC61Xxx0xxxx 1 6.25msec XC61Xxx1xxxx 2 50msec XC61Xxx2xxxx 3 100msec XC61Xxx3xxxx 4 200msec XC61Xxx4xxxx 5 400msec XC61Xxx5xxxx 6 1.6sec XC61Xxx6xxxx

④⑤ Represents detect voltage MARK

DETECT VOLTAGE (V)

④ ⑤

3 3 3.3 5 0 5.0

PRODUCT SERIES

XC61Xxxx33xx XC61Xxxx50xx ⑥ Represents production lot number

0 to 9 and A to Z repeated. (G, I, J, O, Q, W excepted.) * No character inversion used. ** ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■BLOCK DIAGRAMS

●XC6101, XC6111 Series

●XC6102, XC6112 Series

●XC6103, XC6113 Series

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XC6101~XC6107, XC6111~XC6117 Series

■BLOCK DIAGRAMS (Continued)

●XC6104, XC6114 Series

●XC6105, XC6115 Series

●XC6106, XC6116 Series

●XC6107, XC6117 Series

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■ABSOLUTE MAXIMUM RATINGS

PARAMETER

SYMBOL VIN

MRB

RATINGS

Ta = 25OCUNITS

VSS -0.3 ~ 7.0 V

Input Voltage VSS -0.3 ~ VIN +0.3 V

V WD VSS -0.3 ~ 7.0

Output Current IOUT 20 mA CMOS Output RESETB/RESETVSS -0.3 ~ VIN +0.3

Output Voltage V

N-ch Open Drain OutputRESETB VSS -0.3 ~ 7.0

SOT-25 250 Power Dissipation Pd mW

USP-6C 100

O

Operational Temperature Range Topr -40 ~ +85 C

O

Storage Temperature Range Tstg -40 ~ +125 C

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XC6101~XC6107, XC6111~XC6117 Series

■ELECTRICAL CHARACTERISTICS

●XC6101~XC6107, XC6111~XC6117 Series

MAX. VDF(T) Detect Voltage VDF(T) × 1.02 V 1 Hysteresis Range VDF VDF VHYS V 1 XC6101~XC6107 (*1) × 0.05 × 0.08 Hysteresis Range VDF VDF

VHYS 0 V 1 XC6111~XC6117 (*2) × 0.001 x 0.01

XC61X1/XC61X2/XC61X3VIN=VDF(T)×0.9V- 5 11 XC61X4/XC61X5 (*3)

- 10 16 (The MRB & the WD Pin: VIN=VDF(T)×1.1V

No connection) 18 VIN6.0V - 12 Supply Current ISS µA 2 VIN=VDF(T)×0.9V- 4 10 XC61X6/XC61X7 (*3)

(The MRB Pin: VIN=VDF(T)×1.1V- 8 14 No connection)

16 VIN6.0V - 10 Operating Voltage VIN 1.0 - 6.0 V 1 VIN1.0V 0.15 0.5 -

VIN=2.0V (VDFL(T)> 2.0V)2.0 2.5 - N-ch.

3 VDS = 0.5VVIN=3.0V (VDFL(T) >3.0V)VDFL 3.0 3.5 - mA Output Current IRBOUT

VIN=4.0V (VDFL(T) >4.0V)3.5 4.0 - (RESETB) =CMOS, =VIN6.0V - - 1.1 -0.8 4 P-ch

VDS = 0.5VN-ch VIN6.0V 4.4 4.9 - 3 VDS = 0.5V

VIN==1.0V - - 0.08 - 0.02 VDFH

Output Current IROUT mA VIN=2.0V (VDFH(T)> 2.0V)- - 0.50 - 0.30 =P-ch. (RESET) 4

VDS = 0.5VVIN=3.0V (VDFH(T)>3.0V)- - 0.75 - 0.55

VIN=4.0V (VDFH(T)>4.0V)- - 0.95 - 0.75 =

Temperature △VDF / OppmO

-40C < Topr < 85C - +100 - 1

Characteristics △Topr・VDF / OC

2 3.13 5 13 25 38 Time until VIN is increased from

25 50 75 1.0V to 2.0V

Release Delay Time

TDR and attains to the release 60 100 140 ms 5 (VDF<1.8V) time level,

120 200 280 and the Reset output pin inverts.

240 400 560 960 1600 2240 2 3.13 5 13 25 38 25 50 75 60 100 140 ms 5 120 200 280 240 400 560 960 1600 2240 - 3 30 µs 5 PARAMETER SYMBOL VDFL VDFH

CONDITIONSMIN.VDF(T)× 0.98VDF × 0.02

TYP. Ta = 25OCUNITSCIRCUITRelease Delay Time

(VDF>1.9V) TDR

Time until VIN is increased from

1.0V to (VDFx1.1V) and attains to the release

time level,

and the Reset output pin inverts. Time until VIN is decreased from 6.0V to 1.0V and attains to the detect voltage level, and the Reset output pin detects

while the WD pin left opened.

VIN=6.0V, RESETB=6.0V (VDFL) VIN=6.0V, RESET=0V (VDFH)

VIN=6.0V, RESETB=6.0V

Detect Delay Time VDFL/VDFH CMOS Output Leak Current

VDFL N-ch Open Drain Output Leak Current

TDF

ILEAK ILEAK

- 0.01 - µA -

0.01

0.10

3

µA 3 NOTE:

*1: XC6101~XC6107 (with hysteresis) *2: XC6111~XC6117 (without hysteresis)

*3: ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) *4: VDF(T): Setting detect voltage

*5: If only “VDF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected).

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■ELECTRICAL CHARACTERISTICS(Continued)

●XC6101~XC6105, XC6111~XC6115 Series

PARAMETER Watchdog Timeout Period (VDF<1.8V) Watchdog Timeout Period (VDF>1.9V) Ta = 25OC

SYMBOL CONDITIONS MIN.TYP. MAX. UNITSCIRCUIT

3.136.25 9.38 25 50 75 Time until VIN increases form

60 100 140 1.0V to 2.0V and

ms 6 TWD

the Reset output pin is released to go into 120 200 280 the detection state. (WD=VSS)

240 400 560 960 1600 2240 3.136.25 9.38 25 50 75 Time until VIN increases form

60 100 140 1.0V to (VDFx1.1V)

ms 6 TWD

and the Reset output pin is released to go 120 200 280 240 400 560 into the detection state. (WD=VSS)

960 1600 2240 TWDIN VWDH VWDL IWD RWD

VIN=6.0V,

Apply pulse from 6.0V to 0V

to the WD pin. VIN=VDF x 1.1V ~ 6.0V VIN=VDF x 1.1V ~ 6.0V

VIN=6.0V, VWD=6.0V (Avg. when peak )VIN=6.0V, VWD=0V (Avg. when peak) VIN=6.0V, VWD=0V, RWD=VIN/ |IWD|

300 - - ns 7 VIN x 0.7

0 - - 19 315

- 6 V 7 - 12 -12 500

VIN x 0.3 19

-

Watchdog

Minimum Pulse Width Watchdog High Level Voltage

Watchdog Low Level Voltage Watchdog Input Current Watchdog Input Resistance

V 7 µA kΩ

8 8

880

●XC6101 ~ XC6103, XC6106 ~ XC6107, XC6111 ~ XC6113, XC6116 ~ XC6117 Series PARAMETER MRB

High Level Voltage

MRB

Low Level Voltage

MRB

Pull-up Resistance MRB Minimum Pulse Width (*3) XC6101~XC6105 XC6111~XC6115 MRB Minimum Pulse Width (*4) XC6106, XC6107 XC6116, XC6117

SYMBOL VMRH VMRL RMR TMRIN

CONDITIONS VIN=VDFx1.1V ~ 6.0V VIN=VDFx1.1V ~ 6.0V

MIN.1.4 0

TYP. - -

MAX. Ta = 25OCUNITSCIRCUIT

VIN 9 V

0.35 9

VIN=6.0V, MRB=0V, RMR=VIN/ |IMRB| 1.6 2.4 3.0 MΩ 10 VIN=6.0V,

Apply pulse from 6.0V to 0V to

the MRB pin VIN=6.0V,

Apply pulse from 6.0V to 0V to

the MRB pin

2.8 - - µs

11

TMRIN 1.2 - -

NOTE:

*1: VDF(T): Setting detect voltage *2: If only “VDF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected). *3: Watchdog function is available. *4: Watchdog function is not available.

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XC6101~XC6107, XC6111~XC6117 Series

The XC6101~XC6107, XC6111~XC6117 series compare, using the error amplifier, the voltage of the internal voltage

■OPERATIONAL EXPLANATION

reference source with the voltage divided by R1, R2 and R3 connected to the VIN pin. The resulting output signal from the

error amplifier activates the watchdog logic, manual reset logic, delay circuit and the output driver. When the VINpin voltage

gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the VDFLtype ICs, and the RESET pin output goes from low to high in the case of the VDFH type ICs.

* VDFL (RESETB) type - output signal: Low when detected.

The RESETB pin output goes from high to low whenever the VINpin voltage falls below the detect voltage, or whenever the MRB pin is driven from high to low. The RESETB pin remains low for the release delay time (TDR) after the VINpin voltage

reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,

the RESETB pin output remains low for the release delay time (TDR), and thereafter the RESET pin outputs high level signal.

* VDFH (RESET) type – output signal: High when detected.

The RESET pin output goes from low to high whenever the VIN pin voltage falls below the detect voltage, or whenever the MRB pin is driven from high to low. The RESET pin remains high for the release delay time (TDR) after the VINpin voltage reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period, the VOUT pin output remains high for the release delay time (TDR), and thereafter the RESET pin outputs low level signal.

When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the hysteresis circuit. The difference between the release and detect voltages represents the hysteresis range, as shown by the following calculations:

VDF (detect voltage) = (R1+R2+R3) x Vref(R2+R3)

VDR (release voltage) = (R1+R2) x Vref(R2)

VHYS (hysteresis range)=VDR-VDF (V)

VDR > VDF

* Detect voltage (VDF) includes conditions of both VDFL (low when detected) and VDFH (high when detected).

* Please refer to the block diagrams for R1, R2, R3 and Vref.

Hysteresis range is selectable from VDF x 0.05V (XC6101~XC6107) or VDF x 0.001V (XC6111~XC6117).

The XC6101~XC6107, XC6111~XC6117 series use a watchdog timer to detect malfunction or “runaway” of the microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period, the RESETB/RESET pin output maintains the detection state for the release delay time (TDR), and thereafter the

RESET/RESETB pin output returns to the release state (Please refer to the FUNCTION CHART). The timer in the watchdog

is then restarted. Six watchdog timeout period settings are available in 1.6sec, 400msec, 200msec, 100msec, 50msec, 6.25msec.

Using the MRB pin input, the RESET/RESETB pin signal can be forced to the detection state. When the MRB pin is driven from high to low, the RESETB pin output goes from high to low in the case of the VDFL type ICs, and the RESET pin output goes from low to high in the case of the VDFH type. Even after the MRB pin is driven back high, the RESET/RESETBpin

output maintains the detection state for the release delay time (TDR). Since the MRB pin is internally pulled up to the VIN pin

voltage level, leave the MRB pin open if unused (Please refer to the FUNCTION CHART). A diode, which is an input protection element, is connected between the MRB pin and VINpin. Therefore, if the MRB pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. Please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN+0.3) on the MRB pin.

Release delay time (TDR) is the time that elapses from when the VIN pin reaches the release voltage, or when the watchdog timeout period expires with no rising signal applied to the WD pin, until the RESET/RESETB pin output is released from the

detection state. Seven release delay time (TDR) watchdog timeout period settings are available in 1.6sec, 400msec,

200msec, 100msec, 50msec, 25msec, 3.13msec.

Detect Delay Time (TDF) is the time that elapses from when the VIN pin voltage falls to the detect voltage until the RESET/ RESETB pin output goes into the detection state.

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■TIMING CHARTS

●CMOS Output

●TDF (CMOS Output)

VINVDFL Level6.0VVIN Pin Wave Form1.0VGNDTDFVIN LevelVDFL LevelVIN x 0.1VGND0.6VRESETB Pin Wave Form (VDFL)13/26

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XC6101~XC6107, XC6111~XC6117 Series

GNDTDRTDRRESETB Pin Wave Form (VDFL)GNDNo reaction time(MAX 900usec)No reaction time(MAX 900usec)GNDWD Pin Wave FormTWDTWDVIN Pin Wave Form■NOTES ON USE

1. Please use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent damage to the device.

2. When a resistor is connected between the VIN pin and the input, the VINvoltage drops while the IC is operating and a malfunction may occur as a result of the IC’s through current. For the CMOS output products, the VIN voltage drops while the IC is operating and malfunction may occur as a result of the IC’s output current. Please be careful with using the XC6111~XC6117 series (without hysteresis).

3. In order to stabilize the IC’s operations, please ensure that the VIN pin’s input frequency’s rise and fall times are more than 1 µ sec/V.

4. Noise at the power supply may cause a malfunction of the watchdog operation or the circuit. In such case, please strength the line between VIN and the GND pin and connect about 0.22µF of a capacitor between the VIN pin and the GND pin.

5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900µsec at maximum.

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■PIN LOGIC CONDITIONS

PIN NAME

VIN MRB

LOGIC CONDITIONS

H VIN>VDF+VHYS L VIN1.40V L MRB<0.35V H When keeping WD>VWDH more than TWD L When keeping WD300nsec H → L VWDH →VWDH, TWDIN>300nsec NOTE:

*1: If only “VDF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected).

*2: For the details of each parameter, please see the electrical characteristics. VDF: Detect Voltage

VHYS: Hysteresis Range

VWDH: WD High Level Voltage VWDL: WD Low Level Voltage TWDIN: WD Pulse Width TWD: WD Timeout Period

WD

■FUNCTION CHART

VIN MRB WD RESETB (*2) H H Repeat detect and release (H→L→H)

H L H or Open H Open H H L → H

H H → L H

L *1 L

L

●XC6101/XC61111, XC6102/6112 Series

●XC6103/XC61113 Series

VIN MRB WD RESETB (*3) H H Repeat detect and release (L→H→L)

H L H or Open H Open L H L → H

H H → L H

L *1 H

L

●XC6104/XC61114, XC6105/XC6115 Series

VIN WD RESETB (*2) RESET (*3) H H Repeat detect and release (H→L→H)Repeat detect and release (L→H→L)

H L H Open H L H L → H

H H → L H

*1 L H L

●XC6106/XC61116, XC6107/XC6117 Series

VIN H H L

MRB H or Open RESETB (*2)

H RESET (*3)

L

L L H *1: Including all logic of WD (WD=H, L, L→H, H→L, OPEN). *2: When the RESETB is High, the circuit is in the release state. When the RESETB is Low, the circuit is in the detection state. *3: When the RESET is High, the circuit is in the release state. When the RESET is Low, the circuit is in the detection state.

*4: VIN=L and MRB=H can not be combined for the rated input voltage of the MRB pin is Vss-0.3V to VIN+0.3V. *5: The RESET/RESETB pin becomes indefinite operation while 0.35V15/26

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XC6101~XC6107, XC6111~XC6117 Series

■TEST CIRCUITS

Circuit 1

Circuit 2

Circuit 3

Circuit 4

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■TEST CIRCUITS (Continued)

Circuit 5

Circuit 6

Circuit 7

17/26

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XC6101~XC6107, XC6111~XC6117 Series

■TEST CIRCUITS (Continued)

Circuit 8

Circuit 9

Circuit 10

Circuit 11

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■TYPICAL PERFORMANCE CHARACTERISTICS

(1.1) Supply Current vs. Input Voltage

Supply Current: ISS (µA)30Supply Current: ISS (µA)2520151050012345Input Voltage: VIN (V)6Ta=-40℃Ta=25℃Ta=85℃XC61X1~XC61X5 (1.6V)302520151050012345Input Voltage: VIN (V)6Ta=-40℃Ta=25℃Ta=85℃

XC61X1~XC61X5 (2.7V)

XC61X1~XC61X5 (5.0V)30Supply Current: ISS (µA)2520151050012345Input Voltage: VIN (V)6Ta=25℃Ta=85℃

Ta=-40℃

(1.2) Supply Current vs. Input Voltage

Supply Current: ISS (µA)30XC61X6~XC61X7 (1.6V)

XC61X6~XC61X7 (2.7V)30Supply Current: ISS (µA)2520151050

2520151050012345Input Voltage: VIN (V)6Ta=25℃Ta=85℃Ta=25℃Ta=85℃Ta=-40℃Ta=-40℃012345Input Voltage: VIN (V)6* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101~XC6107, XC6111~XC6117 Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(1.2) Supply Current vs. Input Voltage (Continued)

Supply Current: ISS (µA)30252015105Ta=-40℃0012345Input Voltage: VIN (V)6Ta=25℃Ta=85℃XC61X6~XC61X7 (5.0V)

(2) Detect, Release Voltage vs. Ambient Temperature

Detect, Release Voltage: VDF,VDR (V)1.70Detect, Release Voltage: VDF,VDR (V)XC61X1~XC61X7 (1.6V)

XC61X1~XC61X7 (2.7V)2.90

1.65VDR2.80VDR1.602.70VDF1.55-50-250255075Ambient Temperature: Ta (℃)100VDF2.60-50-250255075Ambient Temperature: Ta (℃)100XC61X1~XC61X7 (5.0V)5.30Detect, Release Voltage: VDF,VDR (V)5.20VDR5.105.00VDF4.90-50-250255075Ambient Temperature: Ta (℃)100* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

20/26

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(3-1) Output Voltage vs. Input Voltage (VDFL) (3.1) Detect, Release Voltage vs. Input Voltage (VDFL)

Detect, Release Voltage:VDFL,VDR(V)XC6101~XC6107 (1.6V)2.0Rpull:100kΩTa=-40℃   25℃   85℃↓:VDF↑:VDRDetect, Release Voltage:VDFL,VDR(V)3.02.52.01.51.00.50.0012Input Voltage: VIN (V)3Rpull:100kΩTa=-40℃   25℃   85℃↓:VDF↑:VDRXC6101~XC6107 (2.7V)

1.51.00.50.001Input Voltage: VIN (V)2XC6101~XC6107 (5.0V)6.0Detect, Release Voltage:VDFL,VDR(V)5.04.03.02.01.00.0012345Input Voltage: VIN (V)6Rpull:100kΩTa=-40℃   25℃   85℃↓:VDF↑:VDR

(3.2) Detect, Release Voltage vs. Input Voltage (VDFH)

Detect,Release Voltage:VDR,VDFH(V)XC6103~XC6107 (1.6V)2.0Rpull:100kΩTa=-40℃   25℃   85℃↑:VDF↓:VDR

XC6103~XC6107 (2.7V)3.0Detect,Release Voltage:VDR,VDFH(V)2.52.01.51.00.50.0012Input Voltage: VIN (V)3Rpull:100kΩTa=-40℃   25℃   85℃↑:VDF↓:VDR

1.51.00.50.001Input Voltage: VIN (V)2* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101~XC6107, XC6111~XC6117 Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(3.2) Detect, Release Voltage vs. Input Voltage (VDFH) (Continued)

XC6103~XC6107 (5.0V)Detect,Release Voltage:VDR,VDFH(V)6.05.04.03.02.01.00.0012345Input Voltage: VIN (V)6Rpull:100kΩTa=-40℃   25℃   85℃↑:VDF↓:VDR (4) N-ch Driver Output Current vs. VDS

Output Current: IOUT (mA)6Ta=25℃54321001VDS (V)23VIN=2.0VXC61X1~XC61X7

XC61X1~XC61X720Ta=25℃Output Current: IOUT (mA)16VIN=4.0V

12 VIN=3.0V84VIN=1.0V001234VDS (V)56(5) N-ch Driver Output Current vs. Input Voltage XC61X1~XC61X7

Output Current: IOUT (mA)6.0VDS=0.5V5.04.03.02.01.00.0012345Input Voltage: VIN (V)6Ta=85℃Ta=-40℃Ta=25℃

* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(6) P-ch Driver Output Current vs. Input Voltage 1

Output Current: IOUT (mA)6.0Ta=25℃VDS=2.0V4.01.5V3.01.0V2.00.5V1.00.0012345Input Voltage: VIN (V)65.0XC61X1, XC61X3~XC61X7

(7) P-ch Driver Output Current vs. Input Voltage 2

XC61X1, XC61X3~XC61X72.0VDS=0.5VOutput Current: IOUT (mA)1.6Ta=-40℃Ta=25℃Ta=85℃0.4

1.20.80.0012345Input Voltage: VIN (V)6(8) Release Delay Time vs. Ambient Temperature

Release Delay Time TDR(msec)XC61X1~XC61X76.05.04.03.02.01.00.0-50-250255075Ambient Temperature: Ta (℃)100

XC61X1~XC61X7300Release Delay Time TDR(msec)TDR=100msec250200150100500-50-250255075Ambient Temperature: Ta (℃)100

TDR=3.13msecXC61X1~XC61X73000Release Delay Time TDR(msec)TDR=1.6sec25002000150010005000-50-250255075100Ambient Temperature: Ta (℃)* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101~XC6107, XC6111~XC6117 Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(9) Watchdog Timeout Period vs. Ambient Temperature

300WD Timeout Piriod TWD (msec)TWD=6.25msec1086420-50-250255075Ambient Temperature: Ta (℃)100TWD=100msec250200150100500-50-250255075Ambient Temperature: Ta (℃)100XC61X1~XC61X5XC61X1~XC61X512WD Timeout Piriod TWD (msec)

WD Timeout Piriod TWD (msec)XC61X1~XC61X53000TWD=1.6sec250020001500 10005000-50-250255075Ambient Temperature: Ta (℃)100

(10) Release Delay Time vs. Input Voltage

Release Delay Time : TDR(msec)12011010090807060123456Input Voltage: VIN (V)7XC61x1~XC61x7(11) Watchdog Timeout Period vs. Input Voltage

XC61x1~XC61x5120WD Timeout Piriod : TWD (msec)Ta=25℃TWD=100msec

Ta=25℃TDR=100msec11010090807060123456Input Voltage: VIN (V)7* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101 ~ XC6107, XC6111~ XC6117

Series

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(12) Watchdog Low Level Voltage vs. Ambient Temperature(13) Watchdog High Level Voltage vs. Ambient Temperature XC61X1~XC61X56.0WD HighLevel Threshold VoltageVWDH(V)5.04.03.0VIN=3.0V2.01.0VIN=1.76V0.0-50-250255075100-50Ambient Temperature: Ta (℃)-250255075Ambient Temperature: Ta (℃)100VIN=6.0VXC61X1~XC61X56.0WD LowLevel Threshold VoltageVWDL(V)5.04.03.02.01.0VIN=1.76V0.0VIN=6.0VVIN=3.0V (14) MRB Low Level Voltage vs. Ambient Temperature

MRB LowLevel Threshold VoltageVMRL(V)1.101.000.90VIN=3.0V0.800.700.60VIN=1.76V0.50-50-250255075100Ambient Temperature: Ta (℃)VIN=6.0VXC61X1~XC61X3, XC61X6~XC61X7(15) MRB High Level Voltage vs. Ambient Temperature

XC61X1~XC61X3, XC61X6~XC61X71.10MRB HighLevel Threshold Voltage VMRH(V)1.000.900.80VIN=3.0V0.700.600.50-50-250255075100Ambient Temperature: Ta (℃)VIN=1.76VVIN=6.0V

* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

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XC6101~XC6107, XC6111~XC6117 Series

1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd. 26/26

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